B01-vivado_debug.md

B01-vivado_debug.md

社蕙 569 2022-08-28

Vivado的bug与解决方案

1. IP的port无法Make External/无法例化

出现状况

在例化迪芝伦的rgb2div的IP端口时,TMDS的端口无法设置为外部端口。

报错信息

CRITICAL WARNING:[BD 41-181] Type specified by the VLNV: 'digilentinc.com:interface:tmds_rtl:1.0', cannot be found. Interface port: 'TMDS_0' cannot be create

解决方案

参考:forum.digilent.com

将迪芝伦开源库的release下载下来,将if文件夹放在与ip文件夹相同的目录下。

2. TPG(Test Pattern Generator)无法通过综合

出现状况

在综合Xilinx hdmi example design时,TPG无法通过综合。

报错信息

[Synth 8-439] module 'design_1_v_tpg_0_0_v_tpg' not found
[Synth 8-285] failed synthesizing module 'design_1_v_tpg_0_0'
[Synth 8-285] failed synthesizing module 'design_1' .

解决方案

  1. 检查是否有TPG的license,这是一个免费的ip,但在某些版本上仍需要申请,参考:support.xilinx.com

  2. 检查vivado_hls.log文件(它位于project.runs/synth_1/...tpg...)
    Possible reasons:

    1. You are under windows and the path is >256 characters
    2. You have an unexpected character in the project path
  3. 如果vivado_hls.log中报告

     source run_ippack.tcl -notrace
     bad lexical cast: source type value could not be interpreted as target
       while executing
     "rdi::set_property core_revision ########## {component component_1}"
         invoked from within
     "set_property core_revision $Revision $core"
         (file "run_ippack.tcl" line 1112)
     ...
     ERROR: [IMPL 213-28] Failed to generate IP.
     INFO: [HLS 200-111] Finished Command export_design
    

    由于TPG是HLS写的ip,那么需要考虑Revision Number Overflow Issue (也就是臭名昭著的Y2K22),参考support.xilinx.com,通过安装 Patch y2k22_patch-1.2解决问题。

3. ERROR: [filemgmt 56-189] Failed to resolve reference

参考ERROR: [filemgmt 56-189] Failed to resolve reference. Nothing was found in the project to match the name 'aud_pat_gen',尝试将编译顺序设置为自动。

右键点击顶层文件 --> hierarchical update --> automatic update and compile order